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 NEC Develops 'Low-Power, Low-Noise All-Digital Phase Lock Loop' for Portable Wireless Terminals

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Date posted: 10/03/2010

NEC Corporation today announced a development of the "Low-Power Low-Noise All-Digital Phase Lock Loop (ADPLL)" LSI. The newly developed LSI is suitable for midget wireless equipment yielding a long operation lifetime for small-sized batteries. It also features low-phase noise, which is vital to many modern wireless systems, including Bluetooth, ZigBee, WiFi, and WiMAX.

Features of the new PLL circuit:

1. Suitable for intermittently operated wireless equipment owing to the low-operation current and short lock-up time (recovery time from sleep mode) of 8.1 milliamperes (mA) and 20 microseconds, respectively. Operation lifetime for small-sized batteries can be as long as several years even for over-Mbps wireless transmission applications.

2. Low-phase noise of -105 dBc/Hz in the frequency range of 2.1 GHz to 2.8 GHz being compatible with a wide variety of modern wireless systems.

3. Small macro area of 0.37 mm2 including an on-chip Loop-Filter.

In recent years, there are increasing demands for short distance radio communication, such as remote controllers, alarm systems and automatic meter reading. Power consumption is one of the primary concerns of these systems in terms of long battery life. To keep the wireless module as small and lightweight as possible, severe restrictions are being imposed on battery size. As the battery size is reduced, the battery capacity also decreases, thus reducing the total available energy. Long battery life over several years is a desirable feature for these applications as it allows users to become free from battery replacement tasks.

See the full Story via external site: www.physorg.com



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